Besides distributing interrupts among processors, the multi-APIC system allows CPUs to generate interprocessor interrupts. 除了在处理器间分配中断,多APIC系统允许CPU生成处理器内部中断。
Interprocessor communications mostly done via I/ O communication channels, but with routing intelligence. 处理机之间的通信大多数是通过输入/输出通信通道完成,但具有路由选择智能。
Interprocessor Communications Technique Adopted in the YH-F2 The YH-F2 is a high-performance simulation computer. 银河仿真Ⅱ型机YH-F2是高性能的全数字仿真计算机,处理机间通讯是YH-F2采用的关键技术之一。
Interprocessor communication one of the most significant problems in a multiprocessorsvstem. 机间通讯是多机系统中最关键的问题之一。
Host Port Interface of DSP implements interprocessor communication. 处理器之间的通信由DSP的主机接口实现。
This algorithm has short scheduling time and the practicability, thus it can be applied to the task allocation problem subject to task precedence, memory requirements and interprocessor communication costs. 算法考察了多处理机调度中的任务间前趋关系、通信关系以及任务存储量要求,具有实用意义。
The thesis focused on a solution of RISC-DSP-based dual core SoC, introduced the collective architecture of all main parts of the solution, and particularly analyzed the way of interprocessor communication. 文中重点研究了一种基于RISC微处理器及DSP双内核集成芯片系统方案,介绍了方案中各主要部分的总体架构,并详细分析了处理器之间的通信方式。
Meanwhile, with the growing of the system size, interprocessor communication overhead more and more become a bottleneck. 同时,随着系统规模的不断扩大,处理器之间的通信问题变得越来越突出。