Further two classes of fault tolerant multibus systems are proposed; As a result, the previous results are generalized; 将此结果应用于容错多总线系统的最优设计,提出了两类最优容错设计,推广了己有结果;
Secondly, in order to ensure efficient accurate real-time data, the multibus and multithreading sampling system is devised in details. 然后,采用多线程数据采集技术,形成了多总线多线程并行采集系统,保证数据的实时高效,准确无误。
It features the company's third-generation video codec processors and multibus architecture. 它采用该公司的第三代视频解码处理器和多总线应用架构。
Design and Application of Data Collector Based on Multibus in Remote Automatic Meter Reading System 基于多种总线的远程抄表系统采集器的设计与应用
Design of System of Multibus Switch Based on Quantum Frame 基于量子框架的多总线交换机系统设计
Hypergraphs with best connectivity and the design of fault-tolerant multibus multiprocessor systems 具有最佳连通性超图和容错多总线系统的设计
Using the best connectivity bipartite graph, we also present two classes of multibus systems which have the best degree of bus fault tolerance and the best degree of bus-processor fault tolerance as well as better degree of processor fault tolerance. 然后,借助于二元图的最佳连通性,就一般情形,提出了两类多总线系统,它们具有最优总线容错度、最优混合容错度和较优处理机容错度。
On the Maximum Degree of Bus-fault-tolerance for Multibus Architecture 关于多总线结构的最大总线容错度
In this paper, the limit of traditional software development method of the computer based on multibus structure is analyzed. A new method, which is based on IBM PC, and developed by C language, is described. 对基于多总线结构的计算机传统软件开发方式的局限性进行了分析,对一种基于IBMPc机为开发平台,采用C语言开发的软件开发方法进行了研究和探讨。
The Design of the Testing Multibus Module based on EPP 基于增强型并口(EPP)多总线测试模块的设计
The design of fault-tolerant multibus multiprocessor interconnection networks 容错多总线多处理机网络的设计
A new class of multibus structure 一类新的多总线结构
This paper proposes a uniform multibus architecture, which consists of two types of nodes: the processor or computer node and the bus node. 本文提出一种面向总线的容错式多处理器或多计算机网络结构,它由处理器/计算机节点和总线节点构成。
A FCS ( Field Control System) Based on Multibus 基于多总线结构的现场控制系统
Analysis and Design of Optimal Bus Fault Tolerance of Multibus System 多总线系统的最优总线容错性分析与设计
Multibus System Extending Methods 多总线的系统扩展方法
Polynomial-time algorithms for determinating the fault-tolerance degree of Multibus systems 求多总线系统容错度的多项式时间算法
Study of Real-Time Control System for Multibus Multiple Micro Processor 多总线多处理机实时控制系统的研究
The reliability of four types of bus systems: single bus system, completely-connected multibus system, partially connected multibus system and BlB-structured multibus system is analysed. 本文对四种总线结构&单总线、全连接多总线、分组连接多总线和BIB结构多总线系统进行了可靠性研究。
Research on Multibus Mixed Distributed Network Control System 多总线混合分布式网络控制系统研究
Performance Analysis of Multiprocessor Systems of Multibus and Crossbar Interconnection 多总线及纵横开关互连的多处理器系统性能分析
The Hypergraph Design Method of Multibus Structures of Reliable Communication Networks 可靠通信网多总线结构的超图设计法
The fault-tolerant design of multibus structure in which each processor was connected to two buses, and a new class of multibus structure with better falu-tolerant and expandability was put forward. 研究每个处理挂在两条总线上的多总线结构的容错设计问题,提出了一类新的具有较佳(最佳)容错性和可扩充性的多总线结构。
Efficient algorithms for determining the fault-tolerance of Multibus system 确定多总线系统容错度的有效算法
Some results are presented which related fault-tolerance degrees of a multibus system with the connectivity of the bipartite graph induced by the system. 首先建立了多总线系统三种容错性指标(总线容错度Tb、处理机容错度Tp、混合容钳度T(bp))与相应的二元图连通度的关系。
Furthermore, two kinds of uniform multibus architectures with degree 3 and same node number for two types of nodes are also proposed in this paper. 文中还提出了两类节点线度均为3、且两类节点数相等的二种均匀多总线网络结构。